GATE 2012 Suppose the instruction set architecture of the

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GATE 2012 
Suppose the instruction set architecture of the processor has only two registers. The only allowed compiler optimization is code motion, which moves statements from one place to another while preserving correctness. What is the minimum number of spills to memory in the compiled code?

(A) 0
(B) 1
(C) 2
(D) 3

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