In 2’s complement addition, overflow
(a) is flagged whenever there is carry from sign bit addition
(b) cannot occur when a positive value is added to a negative value
(c) is flagged when the carries from sign bit and previous bit match
(d) None of the above
oops its B here ..but just remember the following conditions for overflow 1> if the sign bit numbers are different then overflow never occurs if both are same both 0 or both 1 then overflow occurs iff the result of adding it is different .
Ex.. 0001+0111 — > 1000 both Lsb are 0 but result is 1 so here 4 bit overflow..
2) second condition is xor of the left two carry bits is 1 then its overflow.. this condition is specifically for twos complement …
and to crosscheck .. just perform the addition or subtraction in decimal… if it can’t fit into the given figits… ie for above example its 4 bit addition… and ans requires more than that.. 5 bits…